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ATmega128
Minimizing Power
Consumption
Analog to Digital
Converter
Analog Comparator
Brown-out Detector
Internal Voltage
Reference
Watchdog Timer
Port Pins
There are several issues to consider when trying to minimize the power consumption in an AVR
controlled system. In general, sleep modes should be used as much as possible, and the sleep
mode should be selected so that as few as possible of the device’s functions are operating. All
functions not needed should be disabled. In particular, the following modules may need special
consideration when trying to achieve the lowest possible power consumption. See also “System
Clock and Clock Options” on page 35 .
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-
abled before entering any sleep mode. W hen the ADC is turned off and on again, the next
conversion will be an extended conversion. Refer to “Analog to Digital Converter” on page 230
for details on ADC operation.
W hen entering Idle mode, the Analog Comparator should be disabled if not used. W hen entering
ADC Noise Reduction mode, the Analog Comparator should be disabled. In the other sleep
modes, the Analog Comparator is automatically disabled. However, if the Analog Comparator is
set up to use the Internal Voltage Reference as input, the Analog Comparator should be dis-
abled in all sleep modes. Otherwise, the Internal Voltage Reference will be enabled,
independent of sleep mode. Refer to “Analog Comparator” on page 227 for details on how to
configure the Analog Comparator.
If the Brown-out Detector is not needed in the application, this module should be turned off. If the
Brown-out Detector is enabled by the BODEN fuse, it will be enabled in all sleep modes, and
hence, always consume power. In the deeper sleep modes, this will contribute significantly to
the total current consumption. Refer to “Brown-out Detector” on page 47 for details on how to
configure the Brown-out Detector.
The Internal Voltage Reference will be enabled when needed by the Brown-out Detector, the
Analog Comparator or the ADC. If these modules are disabled as described in the sections
above, the internal voltage reference will be disabled and it will not be consuming power. W hen
turned on again, the user must allow the reference to start up before the output is used. If the
reference is kept on in sleep mode, the output can be used immediately. Refer to “Internal Volt-
age Reference” on page 53 for details on the start-up time.
If the W atchdog Timer is not needed in the application, this module should be turned off. If the
W atchdog Timer is enabled, it will be enabled in all sleep modes, and hence, always consume
power. In the deeper sleep modes, this will contribute significantly to the total current consump-
tion. Refer to “ W atchdog Timer” on page 54 for details on how to configure the W atchdog Timer.
W hen entering a sleep mode, all port pins should be configured to use minimum power. The
most important thing is then to ensure that no pins drive resistive loads. In sleep modes where
the both the I/O clock (clk I/O ) and the ADC clock (clk ADC ) are stopped, the input buffers of the
device will be disabled. This ensures that no power is consumed by the input logic when not
needed. In some cases, the input logic is needed for detecting wake-up conditions, and it will
then be enabled. Refer to the section “Digital Input Enable and Sleep Modes” on page 69 for
details on which pins are enabled. If the input buffer is enabled and the input signal is left floating
or have an analog signal level close to V CC /2, the input buffer will use excessive power.
47
2467X–AVR–06/11
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